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Vol. 2024 No. 4
Vol. 2024 No. 4
Published:
2024-09-05
Articles
SAT-based Formal Verification of Fault Injection Countermeasures for Cryptographic Circuits
Huiyu Tan, Pengfei Gao, Fu Song, Taolue Chen, Zhilin Wu
1-39
PDF
A Not So Discrete Sampler: Power Analysis Attacks on HAWK signature scheme
Morgane Guerreau, Mélissa Rossi
156-178
PDF
Fault-Resistant Partitioning of Secure CPUs for System Co-Verification against Faults
Simon Tollec, Vedad Hadži´c, Pascal Nasahl, Mihail Asavoae, Roderick Bloem, Damien Couroussé, Karine Heydemann, Mathieu Jan, Stefan Mangard
179-204
PDF
Fast Transciphering Via Batched And Reconfigurable LUT Evaluation
Leonard Schild, Aysajan Abidin, Bart Preneel
205-230
PDF
Breaking Ground: A New Area Record for Low-Latency First-Order Masked SHA-3
Advancing from the 4x Area Era to the 3x Area Era
Cankun Zhao, Hang Zhao, Jiangxue Liu, Bohan Yang, Wenping Zhu, Shuying Yin, Min Zhu, Shaojun Wei, Leibo Liu
231-257
PDF
Elastic MSM: A Fast, Elastic and Modular Preprocessing Technique for Multi-Scalar Multiplication Algorithm on GPUs
Xudong Zhu, Haoqi He, Zhengbang Yang, Yi Deng, Lutan Zhao, Rui Hou
258-284
PDF
TRNG Entropy Model in the Presence of Flicker FM Noise
Adriaan Peetermans, Ingrid Verbauwhede
285-306
PDF
Combined Threshold Implementation
Jakob Feldtkeller, Jan Richter-Brockmann, Pascal Sasdrich, Tim Güneysu
307-334
PDF
Improved High-Order Masked Generation of Masking Vector and Rejection Sampling in Dilithium
Jean-Sébastien Coron, François Gérard, Tancrède Lepoint, Matthias Trannoy, Rina Zeitoun
335-354
PDF
pyecsca: Reverse engineering black-box elliptic curve cryptography via side-channel analysis
Jan Jancar, Vojtech Suchanek, Petr Svenda, Vladimir Sedlacek, Łukasz Chmielewski
355-381
PDF
Phase Modulation Side Channels: Jittery JTAG for On-Chip Voltage Measurements
Colin O’Flynn
382-424
PDF
Switching Off your Device Does Not Protect Against Fault Attacks
Paul Grandamme, Pierre-Antoine Tissot, Lilian Bossuet, Jean-Max Dutertre, Brice Colombier, Vincent Grosso
425-450
PDF
Robust but Relaxed Probing Model
Nicolai Müller, Amir Moradi
451-482
PDF
Masking FALCON’s Floating-Point Multiplication in Hardware
Emre Karabulut, Aydin Aysu
483-508
PDF
Static Leakage in Dual-Rail Precharge Logics
Bijan Fadaeinia, Thorben Moos, Amir Moradi
509-540
PDF
Through the Looking-Glass: Sensitive Data Extraction by Optical Probing of Scan Chains
Tuba Kiyan, Lars Renkes, Marvin Sass, Antonio Saavedra, Norbert Herfurth, Elham Amini, Jean-Pierre Seifert
541-568
PDF
Bake It Till You Make It
Heat-induced Power Leakage from Masked Neural Networks
Dev M. Mehta, Mohammad Hashemi, David S. Koblah, Domenic Forte, Fatemeh Ganji
569-609
PDF
FaultDetective
Explainable to a Fault, from the Design Layout to the Software
Zhenyuan Liu, Dillibabu Shanmugam, Patrick Schaumont
610-632
PDF
Improved Circuit Synthesis with Multi-Value Bootstrapping for FHEW-like Schemes
Johannes Mono, Kamil Kluczniak, Tim Güneysu
633-656
PDF
An Algebraic Approach for Evaluating Random Probing Security With Application to AES
Vahid Jahandideh, Bart Mennink, Lejla Batina
657-689
PDF
Prime Masking vs. Faults - Exponential Security Amplification against Selected Classes of Attacks
Thorben Moos, Sayandeep Saha, François-Xavier Standaert
690-736
PDF
Faster Complete Addition Laws for Montgomery Curves
Reza Rezaeian Farashahi, Mojtaba Fadavi, Soheila Sabbaghian
737-762
PDF
SPA-GPT: General Pulse Tailor for Simple Power Analysis Based on Reinforcement Learning
Ziyu Wang, Yaoling Ding, An Wang, Yuwei Zhang, Congming Wei, Shaofei Sun, Liehuang Zhu
40-83
PDF
Enabling PERK and other MPC-in-the-Head Signatures on Resource-Constrained Devices
Slim Bettaieb, Loïc Bidoux, Alessandro Budroni, Marco Palumbi, Lucas Pandolfo Perin
84-109
PDF
Closing the Gap: Leakage Contracts for Processors with Transitions and Glitches
Johannes Haring, Vedad Hadži´c, Roderick Bloem
110-132
PDF
Another Evidence to not Employ Customized Masked Hardware
Identifying and Fixing Flaws in SCARV
Felix Uhle, Florian Stolz, Amir Moradi
133-155
PDF
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